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Chapter 10 Synchronization and Scheduling in Multiprocessor Operating Systems Copyright © 2008 Introduction • Architecture of Multiprocessor Systems • Issues in Multiprocessor Operating Systems • Kernel Structure • Process Synchronization • Process Scheduling • Case Studies Operating Systems, by Dhananjay Dhamdhere hamdhere 10.2 2 Copyright © 2008 Architecture of Multiprocessor Systems • Performance of uniprocessor systems depends on CPU and memory performance, and Caches – Further improvements in system performance can be obtained only by using multiple CPUs Operating Systems, by Dhananjay Dhamdhere hamdhere 10.3 3 Copyright © 2008 Architecture of Multiprocessor Systems (continued) Operating Systems, by Dhananjay Dhamdhere hamdhere 10.4 4 Copyright © 2008 Architecture of Multiprocessor Systems (continued) • Use of a cache coherence protocol is crucial to ensure that caches do not contain stale copies of data – Snooping-based approach (bus interconnection) • CPU snoops on the bus to analyze traffic and eliminate stale copies • Write-invalidate variant – At a write, CPU updates memory and invalidates copies in other caches – Directory-based approach • Directory contains information about copies in caches • TLB coherence is an analogous problem – Solution: TLB shootdown action Operating Systems, by Dhananjay Dhamdhere hamdhere 10.5 5 Copyright © 2008 ... - tailieumienphi.vn
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