A flexible high bandwidth low-latency multi-port memory controller
A flexible high bandwidth low-latency multi-port memory controller
The experimental results in an Altera Cyclone V FPGA prove that MPMC is fully operational at 150 MHz and supports up to 32 concurrent connections at various clocks and data widths. More significantly, achieved bandwidth utilization is approximately 93.2 % of the theoretical bandwidth, and the access latency is minimized as compared to previous designs.