Lecture Operating systems: A concept-based approach (2/e): Chapter 13 - Dhananjay M. Dhamdhere

PROPRIETARY MATERIAL. © 2007 The McGraw­Hill Companies, Inc. All rights reserved. No part of this PowerPoint slide may be displayed, reproduced or distributed in any form or by any means, without the prior written permission of the publisher, or used beyond the limited distribution to teachers and educators permitted by McGraw­Hill for their individual course preparation. If you are a student using this PowerPoint slide, you are using it without permission. Chapter 13: Synch. & Scheduling in multiprocessor OS Dhamdhere: Operating Systems— A Concept­Based Approach, 2ed Slide No: 1 Copyright © 2008 Advantages of multiprocessors • Multiprocessor architectures provide three advantages – High throughput * CPUs can service many processes in parallel – Computation speed-up * An application may finish early because its processes may be serviced in parallel – Graceful degradation * Fault in one CPU does not halt the multiprocessor system Chapter 13: Synch. & Scheduling in multiprocessor OS Dhamdhere: Operating Systems— A Concept­Based Approach, 2ed Slide No: 2 Copyright © 2008 Classification of multiprocessor systems • Multiprocessor systems are classified according to the manner in which CPUs access memory units – Uniform memory access (UMA) architecture * All CPUs can access the entire memory in an identical manner * Also called symmetrical multiprocessor (SMP) architecture – Non-uniform memory access (NUMA) architecture * Nodes have their own memories, called local memories * The CPUs in one node can access the local memory of the node faster than the memory of another node – No-remote-memory-access (NORMA) architecture * CPUs can access memory units of other nodes only over the network • Throughput depends on the interconnection network Chapter 13: Synch. & Scheduling in multiprocessor OS Dhamdhere: Operating Systems— A Concept­Based Approach, 2ed Slide No: 3 Copyright © 2008 Interconnection networks • Common CPU–memory interconnection networks – Bus * Low cost, high expandability, reasonable access speeds * Only one CPU–memory conversation can be in progress at any time – Cross-bar switch * CPUs connected along one direction, memory units along another * High cost, low expandability, high access speeds * Many conversations can be in progress at any time – Multistage interconnection network (MIN) * Hybrid between a bus and a cross-bar switch * Each stage consists of many 2 x 2 switches * A path is selected through the stages to reach a memory unit Chapter 13: Synch. & Scheduling in multiprocessor OS Dhamdhere: Operating Systems— A Concept­Based Approach, 2ed Slide No: 4 Copyright © 2008 Interconnection networks Chapter 13: Synch. & Scheduling in multiprocessor OS Dhamdhere: Operating Systems— A Concept­Based Approach, 2ed Slide No: 5 Copyright © 2008 ... - tailieumienphi.vn